Digital Signals and Logic Levels

The puzzle

A pin can only ever carry a voltage, and voltages are continuous: 0.02 V, 1.37 V, 3.29 V. Yet firmware reads the pin and gets exactly one of two answers, 0 or 1. Somewhere between the wire and the register, a decision is made. Where is the line, who draws it, and what happens to a voltage that lands near it?

STEP 1

Two states, one continuous quantity

A digital input is a comparator with an opinion. The chip’s designers promise that any voltage at or below some level, called V_IL (input low), will be read as 0, and any voltage at or above a higher level, V_IH (input high), will be read as 1. Those two numbers are printed in the datasheet, and they are the only promises made about the input.

Between them lies a gap. The datasheet does not say what a voltage in the gap will read. Not “probably 1”, not “it switches at 1.4 V”: nothing. A real input does switch somewhere in that band, but where moves with temperature, supply voltage and manufacturing spread, and the device may even read the same voltage differently from one moment to the next. Treat the gap as undefined.

↑ This step uses the figure at the top of the page.

The figure feeds a real, noisy voltage into two kinds of input. Watch the top row: every time the trace wanders into the hatched band, the plain-threshold reading goes blank rather than showing a guess. Increase the noise and observe the changes between guaranteed LOW, undefined and guaranteed HIGH. Those changes are not a prediction of the actual edge count inside the undefined band.

STEP 2

Outputs promise, inputs require

There are four numbers, and they belong to two different parties.

Symbol	Who	Meaning
$V_{OL}$	driver (output)	highest voltage the output will produce when it drives a 0, at a stated load current
$V_{OH}$	driver (output)	lowest voltage the output will produce when it drives a 1, at a stated load current
$V_{IL}$	receiver (input)	highest voltage the input is guaranteed to read as 0
$V_{IH}$	receiver (input)	lowest voltage the input is guaranteed to read as 1

An output does not care what the receiving chip needs; it simply guarantees to stay below $V_{OL}$ and above $V_{OH}$ as long as you do not load it beyond the stated current. An input does not care who is driving it; it guarantees to read correctly outside the undefined band. Compatibility is the question of whether one chip’s promises satisfy the other chip’s requirements.

STEP 3

Noise margins

Wires pick up noise, ground bounces a little when other outputs switch, and a long cable has a voltage drop. The difference between what the driver guarantees and what the receiver needs is the room you have for all of that:

NM_H = V_{OH(\min)} - V_{IH(\min)}

NM_L = V_{IL(\max)} - V_{OL(\max)}

Both must be positive, and larger is safer. Application notes from logic vendors define them exactly this way (AN-363 in words, SZZA036C as a picture).

INTERACTIVEDoes this output satisfy that input?

Driver (output)

Receiver (input)

High noise margin = V_OH − V_IH = 2.4 − 3.5 = -1.1 V. Low noise margin = V_IL − V_OL = 1.5 − 0.4 = 1.1 V. A driver high of 2.4 V does not reach the receiver’s 3.5 V minimum: a HIGH may be read as undefined.

Left: what the driver guarantees to produce. Right: what the receiver needs to see. The high noise margin is V_OH(min) − V_IH(min); the low noise margin is V_IL(max) − V_OL(max). Both must be positive, and the driver’s high level must also stay below the receiver’s pin rating. Values are rounded examples of common families; always read the two real datasheets.

Try the 3.3 V LVTTL-style driver into the 5 V CMOS input. The high margin is negative: a guaranteed-high of 2.4 V does not reach the 3.5 V the 5 V CMOS input insists on. It might work on the bench, because the driver typically outputs closer to 3.3 V and the input typically switches near 2.5 V, but nothing guarantees it, and the first hot day or slightly weak unit will find the gap.

STEP 4

Worked example: two real 3.3 V-compatible thresholds

The JEDEC 3.3 V interface standard (JESD8C) sets the levels most “3.3 V logic” follows: inputs must accept $V_{IH} \ge 2.0$ V and $V_{IL} \le 0.8$ V; LVTTL-compatible outputs must produce $V_{OH} \ge 2.4$ V while sourcing 2 mA and $V_{OL} \le 0.4$ V while sinking 2 mA. The RP2040 datasheet lists the same 2.0 V / 0.8 V input thresholds at IOVDD = 3.3 V, with $V_{OL} \le 0.5$ V and $V_{OH} \ge 2.62$ V at whatever drive-strength current is selected.

Suppose a JESD8C LVTTL-style output drives an RP2040 input:

NM_H = 2.4 - 2.0 = 0.4\ \text{V}

NM_L = 0.8 - 0.4 = 0.4\ \text{V}

Both margins are positive, so the pair is compatible on paper with 0.4 V of headroom each way. Now suppose the driver is the RP2040 and the receiver is a 5 V-supplied ATmega328P, whose datasheet requires $V_{IH} \ge 0.6\,V_{CC} = 3.0$ V at 5 V:

NM_H = 2.62 - 3.0 = -0.38\ \text{V}

Negative. The RP2040 cannot guarantee a 1 that the ATmega328P will guarantee to read as 1. The low side is fine ( $0.3 \times 5 - 0.5 = 1.0$ V), which is typical: mixing supply voltages usually breaks the high margin first. A level shifter, or running the ATmega328P at 3.3 V, fixes it.

STEP 5

The Schmitt trigger: two thresholds instead of one

A slow or noisy edge lingers in the undefined band, and a plain input may flicker. A Schmitt-trigger input replaces the single band with two switching points: the input goes high only when the voltage rises above an upper threshold $V_{T+}$ , and goes low only when it falls below a lower threshold $V_{T-}$ . In between it holds its previous state. The difference $V_{T+} - V_{T-}$ is the hysteresis.

DIAGRAMTransfer curves: one threshold versus two

Plain input: one band, unspecified inside it. Schmitt input: two thresholds, switching depends on direction.

Output state against input voltage. Left: a plain input has a band where the output is not specified. Right: a Schmitt-trigger input stays LOW until the upper threshold on a rising input, and stays HIGH until the lower threshold on a falling input, so the switching point depends on direction. The loop width is the hysteresis.

Look again at the interactive figure at the top and compare the bottom two rows. With peak-to-peak noise smaller than the hysteresis on a monotonic edge, the Schmitt-trigger reading changes exactly once per intended edge, however slowly the edge crawls. Most microcontroller inputs offer Schmitt triggers, sometimes always on, sometimes as an option; the RP2040 specifies at least 0.2 V of hysteresis at 3.3 V when its Schmitt trigger is enabled. Whether the hysteresis is bigger than your noise is a question you still have to answer.

Hysteresis is not free: it adds a little delay and it does not help if the noise is larger than the window. But for buttons, slow sensors and long cables it is the difference between one edge and a burst of them.

STEP 6

Why “3.3 V logic” proves nothing by itself

Two parts can both run from 3.3 V and still fail to communicate:

One might use CMOS-style thresholds (fractions of the supply, say $V_{IH} \ge 0.7\,V_{DD}$ = 2.31 V) while the other only guarantees an LVTTL-style $V_{OH} \ge 2.4$ V at its rated load. The margin is 0.09 V, and a 150 mV ground offset eats it.
The receiver’s absolute maximum pin voltage may be $V_{DD} + 0.3$ V; a “3.3 V” driver running from a poorly regulated 3.6 V rail can exceed it.
Open-drain outputs (common on I²C and on many interrupt lines) produce a high level only through a pull-up resistor, so their $V_{OH}$ depends on your resistor and the bus load, not on the datasheet.

The supply label tells you where to start looking. The four threshold numbers, at your actual currents and temperature, tell you whether it works.

MYTHS AND FACTS

Common misconceptions

The input switches halfway, at V_DD/2

It switches somewhere between V_IL and V_IH, and the datasheet does not promise where.

A reading in the undefined band is random noise

It can be stable for a long time and then change with temperature. Stable is not the same as guaranteed.

V_OH is the output voltage

It is the minimum high the output guarantees at a stated current. Draw more current and the guarantee is void; draw less and you usually get closer to the rail.

Schmitt triggers remove noise

For a monotonic edge, a noise excursion whose peak-to-peak span is less than the hysteresis cannot by itself cross both thresholds. Larger noise still passes through.

Same supply voltage means compatible

Compare the four numbers; the supply label is a hint, not a proof.

Check yourself

Answer in your head, then open the card.

A driver guarantees V_OL ≤ 0.4 V and V_OH ≥ 2.4 V. A receiver needs V_IL ≤ 0.8 V and V_IH ≥ 2.0 V. What are the noise margins?

$NM_L = 0.8 - 0.4 = 0.4$ V and $NM_H = 2.4 - 2.0 = 0.4$ V. Compatible, with 0.4 V of room for noise on each side.

The same driver feeds an input that needs V_IH ≥ 3.5 V. Will it work?

Not reliably. $NM_H = 2.4 - 3.5 = -1.1$ V. The driver’s guaranteed high can be far below what the input requires, even if a particular pair of parts happens to work on the bench.

A sensor produces a 1 V-per-second ramp into a plain digital input. Why might the firmware see several edges instead of one?

The ramp spends 1.2 s crossing the 0.8–2.0 V undefined band (for the example thresholds). Any noise during that time can push the reading back and forth. A Schmitt-trigger input with hysteresis larger than the noise would switch once.

Why is an input threshold listed as “0.6 V_CC” rather than as a fixed voltage?

Because the input’s switching circuit scales with the supply. At 5 V it needs 3.0 V; at 3.3 V it needs 1.98 V. Quoting a fraction covers every supported supply; you convert it for yours.

Sources (5)

JEDEC JESD8C, Interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated Circuits (June 2006; JESD8C.01 is the minor revision of September 2007) — Table 2 (inputs: V_IH ≥ 2.0 V, V_IL ≤ 0.8 V), Table 3 (LVTTL outputs: V_OH ≥ 2.4 V at −2 mA, V_OL ≤ 0.4 V at 2 mA), Table 4 (LVCMOS outputs at 100 µA), clause 4.3 noise margins; the PDF requires a free JEDEC account
Raspberry Pi Ltd, RP2040 Datasheet (build 2025-02-20), §5.5.3.4 Table 625 “Digital IO characteristics”, pp. 615–616 — at IOVDD = 3.3 V: V_IL ≤ 0.8 V, V_IH ≥ 2.0 V, hysteresis ≥ 0.2 V with the Schmitt trigger enabled, V_OL ≤ 0.5 V and V_OH ≥ 2.62 V at the selected drive-strength current
Microchip, ATmega48A/PA/88A/PA/168A/PA/328/P Data Sheet, DS40002061B (Rev. B, 08/2020), Table 30-1 “Common DC characteristics”, pp. 322–323 — V_IL ≤ 0.3 V_CC and V_IH ≥ 0.6 V_CC for V_CC = 2.4–5.5 V; notes 1 and 2 define Max/Min as the values where the pin is ensured to read low/high
Texas Instruments, SZZA036C “Understanding and Interpreting Standard-Logic Data Sheets” (Dec 2002, rev. June 2016), Figure 50 — graphical definition of the high and low noise margins between V_OH/V_IH and V_IL/V_OL
onsemi (Fairchild), AN-363 “Designing with TTL” (June 1984) — text definition: the logic-0 noise margin is V_IL − V_OL and the logic-1 noise margin is V_OH − V_IH