Binary, Hexadecimal, and Bit Operations

A bit is one binary digit: 0 or 1. Physically it is one storage cell, or one wire held low or high (unit 1 covered how a voltage becomes one of those two states). Eight bits make a byte, and a byte is the smallest unit most processors can address individually.

Writing a byte as a number means assigning a weight to each bit. Bit 0, the rightmost, weighs $2^0 = 1$; bit 7, the leftmost, weighs $2^7 = 128$. The value is the sum of the weights of the bits that are 1:

$$0\text{b}01011010 = 64 + 16 + 8 + 2 = 90$$

↑ This step uses the figure at the top of the page.

The figure shows the same byte three ways, and the important one for hardware is the middle row: two hexadecimal digits. Hex uses sixteen symbols, 0–9 then A–F for ten to fifteen, so one hex digit holds exactly four bits, a nibble. That is the whole reason hardware people use it. A 32-bit register is eight hex digits; each digit maps to four adjacent bits with no arithmetic. Decimal has no such property: 90 tells you nothing about which bits are set until you divide by powers of two.

Memorise this table and you can read any register value directly. 0x5A is 0101 1010; 0xF0 has the top four bits set; 0x80 is only bit 7. In C, 0x prefixes a hex literal and (since C23, and as a common extension before it) 0b prefixes binary. Datasheets usually give you hex.

C has operators that work on each bit position independently, with no carries between positions:

Do not confuse & with && or | with ||. The doubled forms are logical operators that treat the whole value as true or false and produce 0 or 1. 0x04 && 0x02 is 1 (both non-zero); 0x04 & 0x02 is 0 (no bit in common).

The second operand of AND, OR and XOR is usually called a mask: a value whose set bits mark the positions you want to affect. Go back to the figure and try AND with mask 0x0F: the low nibble survives, the high nibble is cleared. OR with 0xF0 forces the high nibble to all ones. XOR with 0xFF inverts everything, the same as NOT.

Registers pack multi-bit fields: a 4-bit prescaler in bits 7:4, a 2-bit mode in bits 2:1. The mask for a field of width $w$ at position $p$ is

$$\text{mask} = (2^{w} - 1) \ll p$$

For width 4 at position 4: $(2^4 - 1) \ll 4 = 15 \ll 4 = 0\text{xF0}$. To read the field, AND with the mask and shift back down; to write it, clear the field, then OR in the new value shifted up:

#define PRESC_Pos  4u
#define PRESC_Msk  (0xFu << PRESC_Pos)

uint32_t presc = (reg & PRESC_Msk) >> PRESC_Pos;             /* read  */
reg = (reg & ~PRESC_Msk) | ((value << PRESC_Pos) & PRESC_Msk); /* write */

The _Pos/_Msk pair is the naming convention CMSIS uses for Cortex-M devices, and most vendor headers follow it. The final & PRESC_Msk in the write protects the neighbouring fields if value is ever larger than the field can hold.

A UART status register reads 0x00000091. The datasheet says bit 0 is RXNE (receive buffer not empty), bit 4 is TXE (transmit buffer empty), bit 7 is BUSY, and bits 6:5 are a 2-bit error code.

Write the value in binary, four bits per hex digit: 0x91 is 1001 0001. Now read off the fields:

• Bit 0 = 1: RXNE set, a byte is waiting.
• Bit 4 = 1: TXE set, you may write the next byte.
• Bit 7 = 1: BUSY.
• Bits 6:5 = 00: no error. In C: (status & (0x3u << 5)) >> 5 = (0x91 & 0x60) >> 5 = 0 >> 5 = 0.

To acknowledge the error field by writing zeros to bits 6:5 while leaving the rest of the register alone: status &= ~(0x3u << 5), which is 0x91 & 0xFFFFFF9F = 0x91, unchanged here because the field was already zero.